================================================================================ Update Utility Toos NOTES ================================================================================ # Provision enable is needed before use the tool. # You can choose to update BIOS, BMC or CPLD separately by the command BIOS “sysfwupdt.efi -u pfrbios.bin UpdateNvram ImmReset” “sysfwupdt.efi -u -recovery pfrbios.bin ImmReset”, //! clear nvram with "-recovery" by default BMC “sysfwupdt.efi -u pfrbmc.bin” or “sysfwupdt.efi -u -recovery pfrbmc.bin ImmReset” CPLD “sysfwupdt.efi -u pfrcpld.bin ImmReset” or “sysfwupdt.efi -u -recovery pfrcpld.bin ImmReset” # update them together by the command ”sysfwupdt.efi -u pfrbmc.bin pfrbios.bin pfrcpld.bin” ================================================================================ Release Notes ================================================================================ ================================================================================ v5p1 ================================================================================ // pfr_tnp_627p4_v5p1.pof - check sum:0x066934AB / user code: C4700051; // pfr_cyp_627p4_v5p1.pof - check sum:0x066BFA37 / user code: C4720051; //! Sanity test config CPLD v5p0 <-> v5p1 , BIOS 27P19 <-> 28P03 / BMC 2.90 <-> 2.91, utility build 16.0.9 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v5p0_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v5p0_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** note of changes ********************************************** RTL N/A FW tmin1_routines.h rev the recovery update intent value to 0x18 when using the utility and mailbox 0xC2 is able to incremtn value Note: ================================================================================ v5p0 ================================================================================ // pfr_tnp_627p4_v5p0.pof - check sum:067156EE / user code: C4700050; // pfr_cyp_627p4_v5p0.pof - check sum:0670385A / user code: C4720050; // non_pfr_tnp_v5p0.pof - check sum:09F6B63C / user code: C4700050; // non_pfr_cyp_v5p0.pof - check sum:09F9CFA2 / user code: C4720050; //! Sanity test config CPLD v4p9 <-> v5p0 , BIOS 27P19 <-> 28P03 / BMC 2.90 <-> 2.91, utility build 16.0.9 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v5p0_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v5p0_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v5p0_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v5p0_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL N/A FW Support TNP/CYP/FCP/DNP PLATFORM ID for the utility cpld_update.h Note: ================================================================================ v4p9 ================================================================================ // pfr_tnp_627p4_v4p9.pof - check sum:066D6474 / user code: C4700049; // pfr_cyp_627p4_v4p9.pof - check sum:0668F989 / user code: C4720049; // non_pfr_tnp_v4p9.pof - check sum:09F8456C / user code: C4700049; // non_pfr_cyp_v4p9.pof - check sum:09F88763 / user code: C4720049; //! Sanity test config CPLD v4p8 <-> v4p9 , BIOS 27P19 <-> 28P03 / BMC 2.90 <-> 2.91, utility build 16.0.9 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v4p9_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v4p9_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v4p9_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v4p9_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL FW Revise the PFR code to avoid recording update successful in the mailbox 0xC2~0xC5 when downgrade version fail status_enums.h / t0_update.h / t0_watchdog_handler.h / tmin1_update.h Note: When use the force update jumper, it must need to AC cycle. BMC will into safe mode when run force update. In the period of the safe mode, BMC no send checkpoint, it will cause FPGA run recovery after 25mins. ================================================================================ v4p8 ================================================================================ // pfr_tnp_627p4_v4p8.pof - check sum:067018D2 / user code: C4700048; // pfr_cyp_627p4_v4p8.pof - check sum:066A2C56 / user code: C4720048; // non_pfr_tnp_v4p8.pof - check sum:09FCAA31 / user code: C4700048; // non_pfr_cyp_v4p8.pof - check sum:09FAB938 / user code: C4720048; //! Sanity test config CPLD v4p7 <-> v4p8 , BIOS 27P19 <-> 28P03 / BMC 2.90 <-> 2.91, utility build 16.0.9 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v4p8_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v4p8_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v4p8_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v4p8_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL Revise the no generate Mem Thermal trip Critical Overtemperature assert log in EWS TNP_CYP_Main.v FW N/A ================================================================================ v4p7 ================================================================================ // pfr_tnp_627p4_v4p7.pof - check sum:06704AA2 / user code: C4700047; // pfr_cyp_627p4_v4p7.pof - check sum:0665856D / user code: C4720047; // non_pfr_tnp_v4p7.pof - check sum:09F99FF2 / user code: C4700047; // non_pfr_cyp_v4p7.pof - check sum:09F5C1AA / user code: C4720047; //! Sanity test config CPLD v4p6 <-> v4p7 , BIOS 27P19 <-> 28P03 / BMC 2.90 <-> 2.91, utility build 16.0.9 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v4p7_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v4p7_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v4p7_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v4p7_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL Restore the "rearm_acm_timer" detection condition in the pfr_*_core.v FW N/A ================================================================================ v4p6 ================================================================================ // pfr_tnp_627p4_v4p6.pof - check sum:066D0223 / user code: C4700046; // pfr_cyp_627p4_v4p6.pof - check sum:06672560 / user code: C4720046; // non_pfr_tnp_v4p6.pof - check sum:09F79ED0 / user code: C4700046; // non_pfr_cyp_v4p6.pof - check sum:09FB5D1E / user code: C4720046; //! Sanity test config CPLD v4p5 <-> v4p6 , BIOS 27P19 <-> 28P03 / BMC 2.89 <-> 2.90, utility build 16.0.9 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v4p6_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v4p6_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v4p6_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v4p6_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL N/A FW 1.BMC/PCH active update times increment store to mailbox 0xC2 and 0xC4; recovery update times increment store to mailbox 0xC3 and 0xC5 only. ================================================================================ v4p5 ================================================================================ // pfr_tnp_627p4_v4p5.pof - check sum:066F8FC2 / user code: C4700045; // pfr_cyp_627p4_v4p5.pof - check sum:066FF853 / user code: C4720045; // non_pfr_tnp_v4p5.pof - check sum:09F96CFA / user code: C4700045; // non_pfr_cyp_v4p5.pof - check sum:09F98C04 / user code: C4720045; //! Sanity test config CPLD v4p4 <-> v4p5 , BIOS 27P19 <-> 28P03 / BMC 2.89 <-> 2.90, utility build 16.0.9 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v4p4_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v4p4_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v4p4_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v4p4_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL 1.revise the spi whitelist that able to 64KB erase spi_control.sv / spi_filter.sv FW ================================================================================ v4p4 ================================================================================ // pfr_tnp_627p4_v4p4.pof - check sum:066F6BF8 / user code: C4700044; // pfr_cyp_627p4_v4p4.pof - check sum:066C0A17 / user code: C4720044; // non_pfr_tnp_v4p4.pof - check sum:09FCB5D1 / user code: C4700044; // non_pfr_cyp_v4p4.pof - check sum:09F7A232 / user code: C4720044; //! Sanity test config CPLD v4p3 <-> v4p4 , BIOS 27P19 <-> 28P03 / BMC 2.89 <-> 2.90, utility build 16.0.8 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v4p4_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v4p4_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v4p4_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v4p4_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL 1.record the fault info of the power sequence and FIVR status to mailbox 0x08,0x09 and 0x7E 2.record the BMC/PCH act/recy update status and times to mailbox 0xC2~0xC5 3.power sequence leave fault state through the IPMI cmd pfr_tnp_cyp_top.sv / pfr_tnp_core.sv / pfr_tnp_recovery_core.sv / pfr_tnp_cyp_recovery_top.sv / pfr_cyp_core.sv / pfr_cyp_recovery_core.sv / TNP_CYP_Main_wrapper.sv /TYP_CYP_Main.v /Mem_Seq.v /Mstr_Seq.v /Cpu_Seq.v /PSU_Seq.v / timer_bank.sv gen_gpi_signals_pkg.sv /gen_gpo_controls_pkg.sv FW 1.record the fault info of the power sequence and FIVR status to mailbox 0x08,0x09 and 0x7E 2.record the BMC/PCH act/recy update status and times to mailbox 0xC2~0xC5 3.power sequence exit fault state through the IPMI cmd 4.PFM Dynamic detection condition 5.PCH updating retimer watchdog reset decompression.h / firmware_recovery.h / pfm.h / pfm_utils.h /pfr_sys.h / gen_gpi_signals.h / gen_gpo_controls.h / mailbox_enums.h / status_enums.h / t0_routines.h / t0_update.h / t0_watchdog_handler.h / timer_utils.h ================================================================================ v4p3 ================================================================================ // pfr_tnp_627p4_v4p3.pof - check sum:066FDA7A / user code: C4700043; // pfr_cyp_627p4_v4p3.pof - check sum:06716D4B / user code: C4720043; // non_pfr_tnp_v4p3.pof - check sum:09FC7D0E / user code: C4700043; // non_pfr_cyp_v4p3.pof - check sum:09FADA33 / user code: C4720043; //! Sanity test config CPLD v4p2 <-> v4p3 , BIOS 27P18 <-> 27P19 / BMC 2.88 <-> 2.89, utility build 16.0.7 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v4p3_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v4p3_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v4p3_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v4p3_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL 1.Revise the CPU FIVR alert to BMC unexpectly. TYP_CYP_Main.v FW N/A ================================================================================ v4p2 ================================================================================ // pfr_tnp_627p4_v4p2.pof - check sum:066D7405 / user code: C4700042; // pfr_cyp_627p4_v4p2.pof - check sum:06736502 / user code: C4720042; // non_pfr_tnp_v4p2.pof - check sum:09FAB88E / user code: C4700042; // non_pfr_cyp_v4p2.pof - check sum:09FA2959 / user code: C4720042; //! Sanity test config CPLD v4p1 <-> v4p2 , BIOS 27P18 <-> 27P19 / BMC 2.88 <-> 2.89, utility build 16.0.7 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v4p2_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v4p2_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v4p2_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v4p2_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL Ctrl PCH_PWROK to hold PLTRST to solve the warm reset cause ACM timeout issue pfr_tnp_cyp_top.v / TNP_CYP_Main_wrapper.sv / TYP_CYP_Main.v / pfr_cyp_core.v / pfr_tnp_core.v / gen_gpo_controls_pkg.sv FW Ctrl PCH_PWROK to hold PLTRST to solve the warm reset cause ACM timeout issue gen_gpo_controls.h / t0_routines.h / t0_watchdog_handler.h ================================================================================ v4p1 ================================================================================ // pfr_tnp_627p4_v4p1.pof - check sum:066BCFFB / user code: C4700041; // pfr_cyp_627p4_v4p1.pof - check sum:06734E88 / user code: C4720041; // non_pfr_tnp_v4p1.pof - check sum:09F831FC / user code: C4700041; // non_pfr_cyp_v4p1.pof - check sum:09FBED49 / user code: C4720041; //! Sanity test config CPLD v4p0 <-> v4p1 , BIOS 27P18 <-> 27P19 / BMC 2.88 <-> 2.89, utility build 16.0.7 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v4p1_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v4p1_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v4p1_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v4p1_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL BMC SGPIO9 & SGPIO19 add the wCPUPwrGd_Dly condition to solve Memory critical overtemperature in the TYP_CYP_Main.v FW Revision the WDT_ACM_BIOS_TIMER checking condition to solve use the warm reset, in the platform_reset_handler() of the t0_routines.h ================================================================================ v4p0 ================================================================================ // pfr_tnp_627p4_v4p0.pof - check sum:0676D1E9 / user code: C4700040; // pfr_cyp_627p4_v4p0.pof - check sum:0671F77E / user code: C4720040; // non_pfr_tnp_v4p0.pof - check sum:09F62590 / user code: C4700040; // non_pfr_cyp_v4p0.pof - check sum:09FB2D80 / user code: C4720040; //! Sanity test config CPLD v3p9 <-> v4p0 , BIOS 27P18 <-> 27P19 / BMC 2.88 <-> 2.89, utility build 16.0.6 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v4p0_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v4p0_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v4p0_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v4p0_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL 1)Parameter 'RELAY1_BUS_SPEED_KHZ' value revise from 100 to 400 in the platform_defs_pkg.sv FW N/A ================================================================================ v3p9 ================================================================================ // pfr_tnp_627p4_v3p9.pof - check sum:066855E3 / user code: C4700039; // pfr_cyp_627p4_v3p9.pof - check sum:0668B53B / user code: C4720039; // non_pfr_tnp_v3p9.pof - check sum:09FADED1 / user code: C4700039; // non_pfr_cyp_v3p9.pof - check sum:09F9601F / user code: C4720039; //! Sanity test config CPLD v3p8 <-> v3p9 , BIOS R01010004 <-> R01010005 / BMC 2.87 <-> 2.88, utility build 16.0.3 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v3p9_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v3p9_cfm1_auto_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v3p9_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v3p9_cfm1_auto.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL 1)sysclk from 50MHz down to 25MHz in the pllip.v FW N/A ================================================================================ v3p8 ================================================================================ //! 20220408 // pfr_tnp_627p4_v3p8.pof - check sum:066505C3 / user code: C4700038; // pfr_cyp_627p4_v3p8.pof - check sum:06649A3F / user code: C4720038; // non_pfr_tnp_v3p8.pof - check sum:0A001D92 / user code: C4700038; // non_pfr_cyp_v3p8.pof - check sum:09FA603A / user code: C4720038; //! Sanity test config CPLD v3p7 <-> v3p8 , BIOS R01010004 <-> R01010005 / BMC 2.87 <-> 2.88, utility build 16.0.3 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v3p8_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v3p8_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v3p8_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v3p8_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL 1)SYS_CLOCK_PERIOD_PS to 45000 in the platform_defs_pkg.sv FW N/A ================================================================================ v3p7 ================================================================================ //! 20220408 // pfr_tnp_627p4_v3p7.pof - check sum:066BC06C / user code: C4700037; // pfr_cyp_627p4_v3p7.pof - check sum:066D9E5C / user code: C4720037; // non_pfr_tnp_v3p7.pof - check sum:09F5D43E / user code: C4700037; // non_pfr_cyp_v3p7.pof - check sum:09F82042 / user code: C4720037; //! Sanity test config CPLD v3p6 <-> v3p7 , BIOS R01010004 <-> R01010005 / BMC 2.87 <-> 2.88, utility build 16.0.3 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v3p7_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v3p7_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v3p7_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v3p7_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL N/A FW Revision the WDT_ACM_BIOS_TIMER checking condition in the platform_reset_handler() of the t0_routines.h ================================================================================ v3p6 ================================================================================ //! 20220408 // pfr_tnp_627p4_v3p6.pof - check sum:066A6B86 / user code: C4700036; // pfr_cyp_627p4_v3p6.pof - check sum:066718AF / user code: C4720036; // non_pfr_tnp_v3p6.pof - check sum:09FB08E2 / user code: C4700036; // non_pfr_cyp_v3p6.pof - check sum:09F6A98F / user code: C4720036; //! Sanity test config CPLD v3p5 <-> v3p6 , BIOS R01010004 <-> R01010005 / BMC 2.87 <-> 2.88, utility build 16.0.3 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v3p6_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v3p6_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v3p6_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v3p6_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL 1) sys_clk from 25MHz up to 50MHz spi_clk from 40MHz up to 80MHz SYS_CLOCK_PERIOD_PS to 50000 in the platform_defs_pkg.sv BUS_SPEED_KHZ to 4000000 in the smbus_filtered_relay.sv FW N/A ================================================================================ v3p5 ================================================================================ //! 20211123 // pfr_tnp_627p4_v3p5.pof - check sum:06760E8F / user code: C4700035; // pfr_cyp_627p4_v3p5.pof - check sum:06786111 / user code: C4720035; // non_pfr_tnp_v3p5.pof - check sum:09FCC747 / user code: C4700035; // non_pfr_cyp_v3p5.pof - check sum:09FD4258 / user code: C4720035; //! Sanity test config CPLD v3p4 <-> v3p5 , utility build 15.0.3 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v3p5_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v3p5_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v3p5_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v3p5_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL 1) Support OCP working in S5,CCB3522 Files changed: OCP.v FW N/A ================================================================================ v3p4 ================================================================================ //! 20210607 // pfr_tnp_627p4_v3p4.pof - check sum:06760E8F / user code: C4700034; // pfr_cyp_627p4_v3p4.pof - check sum:0676E479 / user code: C4720034; // non_pfr_tnp_v3p4.pof - check sum:09FCC747 / user code: C4700034; // non_pfr_cyp_v3p4.pof - check sum:09FD4258 / user code: C4720034; //! Sanity test config - CPLD v3p3 <-> v3p4 / BIOS 0020P29 <-> 0020P30 / BMC 2.80 <-> 2.81, utility build 10 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v3p4_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v3p4_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v3p4_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v3p4_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL 1) Fix the BMC capture untrigger condition when trigging FIVR into S5. Files changed: TNP_CYP_Main.v FW 1) For Inband,fix BMC will reset when execute BIOS recovery online update. For Outband,fix BMC will not reset when execute BIOS recovery online update. Files changed: t0_update.h 2) fix the fw '#include "spi_flash_state.h"' Files changed: t0_update.h ================================================================================ v3p3 ================================================================================ //! 20210428 // pfr_tnp_627p4_v3p3.pof - check sum:067AB5EE / user code: C4700033; // pfr_cyp_627p4_v3p3.pof - check sum:066F946A / user code: C4720033; // non_pfr_tnp_v3p3.pof - check sum:09FF9A28 / user code: C4700033; // non_pfr_cyp_v3p3.pof - check sum:09FAB565 / user code: C4720033; //! Sanity test config - CPLD v3p2 <-> v3p3 / BIOS 0020P23 <-> 0020P24 / BMC 2.80 <-> 2.81, utility build 10 ********************************************** product sign capsule ********************************************** // pfr_cyp_627p4_v3p3_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // pfr_tnp_627p4_v3p3_cfm1_prd.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_tnp_627p4_v3p3_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // pfr_cyp_627p4_v3p3_cfm1_dbg.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** RTL N/A FW 1) Fix BMC will not reset when execute BIOS recovery online update. Files changed: t0_update.h、transition.h ================================================================================ v3p2 ================================================================================ //! 20210302 // pfr_627p4_tnp_v3p2.pof - check sum:06759025 / user code: C4700032; // pfr_627p4_cyp_v3p2.pof - check sum:06780B21 / user code: C4720032; // non_pfr_tnp_v3p2.pof - check sum:09FBE42E / user code: C4700032; // non_pfr_cyp_v3p2.pof - check sum:09FB63C0 / user code: C4720032; //! Sanity test config - CPLD v3p1 <-> v3p2 / BIOS 0020p06 <-> 0020p11 / BMC 2.66 <-> 2.69 ********************************************** product sign capsule ********************************************** // pfr_627p4_tnp_v3p2_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_627p4_cyp_v3p2_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_627p4_tnp_v3p2_dbg_sign_SVN02.bin, used by EWS/sysfwupdt.efi to online update // pfr_627p4_cyp_v3p2_dbg_sign_SVN02.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 ********************************************** note of changes ********************************************** //! merged changes of RP(WilsonCity) pfr627p4 package RTL #1 Fix for the srst powerdown glitch.  Files changed: pfr_core.sv, src/core_cpld/wilson_city/Source/Bmc_Seq.v new issue found in merging Bmc_Seq.v, Bmc_Seq.v wokrs well with RP(WC), but unexpect pfault in "BMC_DONE" caused with condition"FM_SLP_SUS_N" to bmc power rail in TNP/CYP Root cause - RP (WC) PCH DSW well is ready first before turn on all other aux power (ex, p3v3_aux to cpld,etc) TNP/CYP - p3v3_aux is turned on immediately. RTL : WA - modified paramter of "SignalValidationDelay" in Bmc_Seq.v to wait ready of "FM_SLP_SUS_N" to turn on bmc power FW #1 Fix a bug in the CPLD recovery/staging regions write protection setting.  Files changed: spi_rw_utils.h #2 Pet HW watchdog more often when in memcpy_signed_payload to leave more margin.  Files changed: spi_rw_utils.h //! [CYP][2103638316] There is no 83A0 error code after set ME force update jumper on TNP silver board. CYP-BB with second source vr sol has the same issue - RTL : WA solution is to hold "rtl reset" 90ms to discharge pch aux power (pfr reloading image) //! CCB???? - keep dynamic region during recovery update FW : Files changed: firmware_update.h //! [TNP/CYP][2103637482][RTL] about SmaRT-CLST SEL According to PMBus Alert Signal Files changed: TNP_CYP_Main.v assign IRQ_SML1_PMBUS_PCH_ALERT_N = RST_RSMRST_N ? IRQ_SML1_PMBUS_PLD_ALERT_N : 1'b1; ================================================================================ v3p1 ================================================================================ //! 20201127 // pfr_517p4_tnp_v3p1.pof - check sum:06744430 / user code: C4700031; // pfr_517p4_cyp_v3p1.pof - check sum:067337DA / user code: C4720031; // non_pfr_tnp_v3p1.pof - check sum:09FAE9D6 / user code: C4700031; // non_pfr_cyp_v3p1.pof - check sum:09FC2C74 / user code: C4720031; //! Sanity test config - CPLD v3p0 <-> v3p1 / BIOS 0020p06 <-> 0020p11 / BMC 2.66 <-> 2.69 ********************************************** product sign capsule ********************************************** // pfr_517p4_tnp_v3p1_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_517p4_cyp_v3p1_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_517p4_tnp_v3p1_dbg_sign_SVN02.bin, used by EWS/sysfwupdt.efi to online update // pfr_517p4_cyp_v3p1_dbg_sign_SVN02.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version : 01 // CPLD RoT SVN ：02 //RTL [TNP][2103638316] There is no 83A0 error code after set ME force update jumper on TNP silver board. #1 Root cause is identified for i/o latch caused when power on pch aux power #2 WA solution is to hold "rtl reset" 90ms to discharge pch aux power (pfr reloading image) [TNP/CYP][2103638625][pfr] There is “Last Panic- ACM watchdog timer expired” event asserted after SUT leave in S5 idle for around 30 minutes. #1 the acm timer is starting by detecting rising edge of pltrst, find a pulse (low to high) of “pltrst” when power on pch aux power (pfr reloading image) #2 the issue can be found in CRB (WilsonCity) #3 WA solution is to gate the signal "RST_PLTRST_PLD_N" with "PWRGD_P1V05_PCH_AUX" wire wCondi_rst_pltrst_n = RST_PLTRST_PLD_N & PWRGD_P1V05_PCH_AUX; //! wait ready of PWRGD_P1V05 ================================================================================ v3p0 ================================================================================ //! 20201127 // pfr_517p4_tnp_v3p0.pof - check sum:067CCE77 / user code: C4700030; // pfr_517p4_cyp_v3p0.pof - check sum:06721778 / user code: C4720030; // non_pfr_tnp_v3p0.pof - check sum:09F675B2 / user code: C4700030; // non_pfr_cyp_v3p0.pof - check sum:09F94402 / user code: C4720030; //! Sanity test config - CPLD v2p9 <-> v3p0 / BIOS 0019D22 <-> 0019D29 / BMC 2.61p <-> 2.62 ********************************************** product sign capsule ********************************************** // pfr_517p4_tnp_v3p0_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_517p4_cyp_v3p0_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_517p4_tnp_v3p0_dbg_sign_SVN02.bin, used by EWS/sysfwupdt.efi to online update // pfr_517p4_cyp_v3p0_dbg_sign_SVN02.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version // CPLD RoT SVN ：02 //RTL [TNP][2103636794] NVMe SSD will not auto disappear after pull out NVMe SSD on TNP 2U riser. modify "Led_Control_U2.v", the smb alert(to cpu) is not generated caused by false edge detection. //FW [TNP/CYP][2103634987] There are BMC Out-of-band update failure event after online update High SVN BIOS with recovery. modify "flash_validation.h" & "tmin1_routines.h" common issue in RP, but RP is lack of resource to implement solution; follow intel PAE suggestion - IPS : 00545032 ================================================================================ v2p9 ================================================================================ //! 20201027 // pfr_517p4_tnp_v2p9.pof - check sum:0675164D / user code: C4700029; // pfr_517p4_cyp_v2p9.pof - check sum:0672573D / user code: C4720029; // non_pfr_tnp_v2p9.pof - check sum:09F99421 / user code: C4700029; // non_pfr_cyp_v2p9.pof - check sum:09F8BBF4 / user code: C4720029; //! Sanity test config - CPLD v2p8 <-> v2p9 / BIOS0018D79 <-> 0018D65 / BMC2.57 <-> 2.6 ********************************************** product sign capsule ********************************************** // pfr_517p4_tnp_v2p9_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_517p4_cyp_v2p9_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version // CPLD RoT SVN ：01 ********************************************** debug sign capsule ********************************************** // pfr_517p4_tnp_v2p9_dbg_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_517p4_cyp_v2p9_dbg_sign.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version // CPLD RoT SVN ：02 //RTL //1. [2103635230]The SUT without auto power on when Resume on AC Power Loss set to Last State. => [TNP/CYP] modify ADR.v ================================================================================ v2p8 ================================================================================ //! 20200915 // pfr_517p4_tnp_v2p8.pof - check sum:0670C839 / user code: C4700028; // pfr_517p4_cyp_v2p8.pof - check sum:067B877D / user code: C4720028; // non_pfr_tnp_v2p8.pof - check sum:09FE95D0 / user code: C4700028; // non_pfr_cyp_v2p8.pof - check sum:09FA5CBC / user code: C4720028; //! Sanity test config - CPLD v2p7 <-> v2p8 / BIOS0018D31 <-> 0018D38 / BMC2.53 <-> 2.55 ********************************************** product sign capsule ********************************************** // pfr_517p4_tnp_v2p8_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_517p4_cyp_v2p8_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version // CPLD RoT SVN ： 01 ********************************************** debug sign capsule ********************************************** // pfr_517p4_tnp_v2p8_dbg_sign_SVN02.bin, used by EWS/sysfwupdt.efi to online update // pfr_517p4_cyp_v2p8_dbg_sign_SVN02.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version // CPLD RoT SVN ： 02 //RTL //1. [2103628654] AC Bleed-Off Power Cycling on 100ms Interruption after base board random not boot up => [TNP/CYP] modify ADR.v to sovle bleed off issue //2. [CYP] LED occur tiny bright for CPU2 - DIM LEDs. //FW //! CCB #3250 - HSBP/EDSFF CPLD FW update flow ================================================================================ v2p7 ================================================================================ //! 20200810 // pfr_517p4_tnp_v2p7.pof - check sum:06715006 / user code: C4700027; // pfr_517p4_cyp_v2p7.pof - check sum:066BE741 / user code: C4720027; // non_pfr_tnp_v2p7.pof - check sum:09F405D9 / user code: C4700027; // non_pfr_cyp_v2p7.pof - check sum:09F85DD3 / user code: C4720027; ** unprovision first from bios menu before off-line programming bmc/bios flash team off-line programs debug/product bmc/bios image to FAB3 system board, system will hang if do not follow the description above. ** package contain new "sysfwupdt.efi" (version 5) provided from intel it works with bmc 2.53 and later version to support recovery update to pld command run in efi : sysfwupdt.efi -u -recovery pld_cap.bin ImmReset (default behavior of sysfwupdt(v5) delay the fw update after next DC power on, extra parameter "ImmReset" support to update fw immediately in efi) //! Sanity test config - CPLD v2p6 <-> v2p7 /BIOS0017d65 <-> 17d70 / BMC2.45 <-> BMC_2.53) //! Update // 1.Migrate to intel pfr517p4 package // 2.[TNP/CYP] FW nios ram space extend from 13KB to 16KB. 2.1 New issue found and solved with pfr517p4 integration 2.2 When upgrade bmc version with command “sysfwupdt.efi -u -recovery bmc_cap.bin ” => System will update the active area only without recovery area. => it's found that stack/heap usage overlay fw variable region. ====================================== product sign capsule ====================================== // pfr_517p4_tnp_v2p7_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_517p4_cyp_v2p7_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version 01 // CPLD RoT SVN ：01 ====================================== debug sign capsule ====================================== // pfr_517p4_tnp_v2p7_dbg_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_517p4_cyp_v2p7_dbg_sign.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version 01 // CPLD RoT SVN ：02 ================================================================================ v2p6 ================================================================================ //! 20200721 // pfr_481p4_tnp_v2p6.pof - check sum:0679DF70 / user code: C4700026; // pfr_481p4_cyp_v2p6.pof - check sum:06768E0D / user code: C4720026; // non_pfr_tnp_v2p6.pof - check sum:09FB3BCA / user code: C4700026; // non_pfr_cyp_v2p6.pof - check sum:09FD7ECB / user code: C4720026; ** update pld to v2p6 befor using bmc 2.53, or system may takes longer time to boot (pld enter recovery state=> inconsistent pfr rule between bmc & pld) ** unprovision first from bios menu before off-line programming bmc/bios flash team off-line programs debug bmc/bios image to FAB3 system board, system will hang if do not follow the description above. [TNP] Package C6 non-retention residency decreased a lot when PCIe hotplug enabled. fix inverted "FM_SMB_CPU0_ALERT_N" output, cause C6 (residency) only 60% to make C6 (residency) around 80% still need to generate "ALERT_N" by hot plug out/in one SSD device. [TNP] P12V_STBY and P12V_AUX of Beta Board Have Drop From S5 to S0 and S0 to S5 fix by changing signal from "P12V_BOARD_PWRGD_FF" to "wPWRGD_PS_PWROK_DLY" assign FM_AUX_SW_EN = (!FM_BRD_ID)? wPWRGD_PS_PWROK_DLY : (wFM_AUX_SW_EN & V800_R20);" [TNP/CYP] There are unknown healthy sensors after update FRUSDR. add whitelist(7'h50/7'h51/7'h52/7'h55) to bmc-mm4-smbus ====================================== product sign capsule ====================================== // pfr_481p4_tnp_v2p6_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_481p4_cyp_v2p6_prd_sign.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version 01 // CPLD RoT SVN ：01 ====================================== debub sign capsule ====================================== // pfr_481p4_tnp_v2p6_dbg_sign_SVN02.bin, used by EWS/sysfwupdt.efi to online update // pfr_481p4_cyp_v2p6_dbg_sign_SVN02.bin, used by EWS/sysfwupdt.efi to online update // CPLD RoT Release Version 01 // CPLD RoT SVN ：02 ================================================================================ v2p5 ================================================================================ //! 20200703 // pfr_481p4_tnp_v2p5.pof - check sum:06813993 / user code: C4700025 // pfr_481p4_cyp_v2p5.pof - check sum:067CC28B / user code: C4720025 // pfr_481p4_tnp_v2p5_dbg_signed.bin, used by EWS/sysfwupdt.efi to online update // pfr_481p4_cyp_v2p5_dbg_signed.bin, used by EWS/sysfwupdt.efi to online update // non_pfr_tnp_v2p5.pof - check sum:09FD09B7 / user code: C4700025 // non_pfr_cyp_v2p5.pof - check sum:09FE2CB1 / user code: C4720025 //! Sanity test config - CPLD v2p3 <-> v2p4 /BIOS0017d24 <-> 17d55 / BMC2.47 <-> BMC_2.50) //! New found issue with pfr481p4 // 1. [CYP only]When "downgrade" bios version with command “sysfwupdt.efi -u BIOS_UpdateCapsule.bin UpdateNvram ” => System will boot automatically but bios Fail to boot complete with Beep sound and No screen output (EWS event log show "IERR - Non-boot core FIVR fault - Asserte" => it's found with bios "17d24", but no such issue with other bios version (ex> 17d55 -> 16d55) //! Update // 1.Migrate to intel pfr481p4 package //! FW - // CPLD RoT Release Version 01 // CPLD RoT SVN ：00 //! implemented and wait to verify 2103632535 CPU FIVR fault asserted randomly during DC reboot cycle with dual CPU configured. //! removed “filter CPU PG signal" vs. v2p4 ================================================================================ v2p4 ================================================================================ //! 20200629 // pfr_481p4_tnp_v2p4.pof - check sum:06709B7D / user code: C4700024 // pfr_481p4_cyp_v2p4.pof - check sum:0672BEDB / user code: C4720024 // pfr_481p4_tnp_v2p4_dbg_signed.bin, used by EWS/sysfwupdt.efi to online update // pfr_481p4_cyp_v2p4_dbg_signed.bin, used by EWS/sysfwupdt.efi to online update // non_pfr_tnp_v2p4.pof - check sum:09F65C66 / user code: C4700024 // non_pfr_cyp_v2p4.pof - check sum:09FC8B4E / user code: C4720024 //! Sanity test config - CPLD v2p3 <-> v2p4 /BIOS0017d24 <-> 17d55 / BMC2.47 <-> BMC_2.50) //! New found issue with pfr481p4 // 1. [CYP only]When downgrade bios version with command “sysfwupdt.efi -u BIOS_UpdateCapsule.bin UpdateNvram ” => System will boot automatically but bios Fail to boot complete with Beep sound and No screen output (EWS event log show "IERR - Non-boot core FIVR fault - Asserte" Workaround => Press Power button to (force)power off and press again to Power on. //! Update // 1.Migrate to intel pfr481p4 package //! FW - // CPLD RoT Release Version 01 // CPLD RoT SVN ：00 //! implemented and wait to verify 2103630370 TNP VMD function rebuild LED is fail under Windows2019. 2103633682 [ICX]After set bypass jumper physically , Bypass status still show off 2103632485 SUT can not power on ramdomly after AC/DC cycle with BPS 8+8 config 2103633623 [CYP]No voice while test Speaker 2103633652 OCP Module FRU Storage Device is NOT presented after update FRUSDR successfully other : similar issue [CYP, 0017D51, other, issue] BIOS cannot detect OCP module with CPLD 2p3 ================================================================================ v2p3 ================================================================================ //! 20200611 // pfr_466p6_tnp_v2p3.pof - check sum:066CE30E / user code: C4700023 // pfr_466p6_cyp_v2p3.pof - check sum:06779709 / user code: C4720023 // pfr_466p6_tnp_v2p3_dbg_signed.bin, used by EWS/sysfwupdt.efi to online update // pfr_466p6_cyp_v2p3_dbg_signed.bin, used by EWS/sysfwupdt.efi to online update // non_pfr_tnp_v2p3.pof - check sum:09FA6934 / user code: C4700023 // non_pfr_cyp_v2p3.pof - check sum:09FCA314 / user code: C4720023 //! Sanity test config - CPLD v2p3 <-> v2p1 /BIOS0016D55 <-> 16d44 / BMC2.45_FRUSDR0.14 <-> BMC_0.27) //! New found issue with pfr466p6 // 1. When downgrade bios version with command “sysfwupdt.efi -u BIOS_UpdateCapsule.bin UpdateNvram ” => Bios Fail to boot complete and screen show “Fatal Error” # Need to clear cmos or remove battery to boot Or # Run "sysfwupdt.efi -u -recovery BIOS_UpdateCapsule.bin UpdateNvram" //! Update // 1.Updated the ADR coding. // 2.Updated the CCB function. Amber LED On and Green LED off when LED blinking time greater than 120sec. // 3.Adding OCP3.0 function. //! RTL – // 1. "ADR.v" modify the state machine by intel => need to revalidate // 2. "SysCheck.v" add the port 'oICX' to "CPU_Seq.v" // 3. "PSU_Seq.v" modify the wire'PWRGD_PS_PWROK_DLY' from delay 100ms to 0. // 4. "Mstr_Seq.v modify the state machine by intel // 5. "pfr_tnp_core,pfr_cyp_core,pfr_tnp_recovery_core,pfr_cyp_recovery_core" modify CCB function. //! FW - // CPLD RoT Release Version 01 // CPLD RoT SVN ：00 // 1."tmin1_update.h" remove PCH FW Update from 'act_on_bmc_update_intent()' and add 'prep_for_oob_pch_fw_update()' to do PCH FW Update // 2."t0_watchdog_handler.h" modify the checkpoint content of 'acm_bios_watchdog_timer_handler()' // 3."t0_provisioning.h" modify the function content // 4."platform_log.h" add the 'log_tmin1_recovery_on_active_image()' and 'log_tmin1_recovery_on_recovery_image' platform state // 5."flash_validation.h" remove some parts of platform state // 6."decompression.h" modify the erase content of 'decompress_spi_region_from_capsule()' ================================================================================ v2P2 ================================================================================ //! 20200529 // pfr_466p6_tnp_v2P2.pof - check sum:067D6A80 / user code: C4700022 // pfr_466p6_cyp_v2P2.pof - check sum:067890CD / user code: C4720022 // pfr_466p6_tnp_v2P2_update_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_466p6_cyp_v2P2_update_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // non_pfr_tnp_v2P2.pof - check sum:09F8B166 / user code: C4700022 // non_pfr_cyp_v2P2.pof - check sum:09FDC76A / user code: C4720022 //! Sanity test config - CPLD v2P2 /BIOS0016D55/ BMC2.45_FRUSDR0.14) //! Update // 1.Updated the ADR coding. // 2.Updated the CCB function. Amber LED On and Green LED off when LED blinking time greater than 120sec. // 3.Adding OCP3.0 function. // 4.support to remove external jumper to "chip select" signal, and force "CS" to PCH flash part is support for ICX only, //! RTL – // 1. "ADR.v" modify the state machine by intel => need to revalidate // 2. "SysCheck.v" add the port 'oICX' to "CPU_Seq.v" // 3. "PSU_Seq.v" modify the wire'PWRGD_PS_PWROK_DLY' from delay 100ms to 0. // 4. "Mstr_Seq.v modify the state machine by intel // 5. "pfr_tnp_core,pfr_cyp_core,pfr_tnp_recovery_core,pfr_cyp_recovery_core" modify CCB function. //! FW - // CPLD RoT Release Version 01 // CPLD RoT SVN ：00 // 1."tmin1_update.h" remove PCH FW Update from 'act_on_bmc_update_intent()' and add 'prep_for_oob_pch_fw_update()' to do PCH FW Update // 2."t0_watchdog_handler.h" modify the checkpoint content of 'acm_bios_watchdog_timer_handler()' // 3."t0_provisioning.h" modify the function content // 4."platform_log.h" add the 'log_tmin1_recovery_on_active_image()' and 'log_tmin1_recovery_on_recovery_image' platform state // 5."flash_validation.h" remove some parts of platform state // 6."decompression.h" modify the erase content of 'decompress_spi_region_from_capsule()' ================================================================================ v2p1 ================================================================================ //! 20200512 - early relase for BMC 2.45 (Orange Release) //! new i2c rules are needed to integrate to bmc/cpld image for passing pfr-authentication //! programming image also used for CYP-Fab3 BB //! step to apply new image to BB-CYP-Fab2 1. online update pld image with jtag download cable 2. offline update bmc image to flash 3. update frusdr 4. rework SB(hsbp & mid plane) to change fru address to have correct fru reading //! how to apply capsule file to BB-CYP-Fab2 - // 1. cannot update independently because rules are chaged, updating one capsule (bmc or cpld) only will cause fail authentication because inconsistent rules to bmc/cpld, new bmc capsule can update to active region but the active region will be recovery for fail authentication. 2. update to new bmc & pld image at the same time # sysfwupdate -u CoyotePass-bmc_signed_cap_2.45.15da7ca0.bin pfr_438p4_cyp_v2p1_update_capsule_signed.bin update frusdr 3. roll back to old bmc & pld image at the same time # sysfwupdate -u CoyotePass-bmc_signed_cap_0.27.c10aebfd.bin pfr_438p4_cyp_v2p0_update_capsule_sign.bin update frusdr //! (Sanity test config - CPLD v2P0/ BMC0.27_FRUSDR0.14/ BIOS0016D55 <=> CPLD v2P1/ BMC2.45_FRUSDR0.14/ BIOS0016D5 // pfr_438p4_tnp_v2P1.pof - check sum:0677DB99 / user code: C4700021 // pfr_438p4_cyp_v2P1.pof - check sum:06755273 / user code: C4720021 // pfr_438p4_tnp_v2P1_update_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_438p4_cyp_v2P1_update_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // non_pfr_tnp_v2P1.pof - check sum:09FC1E56 / user code: C4700021 // non_pfr_cyp_v2P1.pof - check sum:09FE66D7 / user code: C4720021 // 1.fixed [CYP] [2103632920] BMC 2.45 cannot initialize completely with CPLD v2p0. //! RTL – // 1.updated "gen_smbus_relay_cyp_config_pkg.sv" with new smbus device address //! FW - // 1.updated "gen_smbus_relay_config.h" with new smbus device address ================================================================================ v2p0 ================================================================================ //! 20200508 // pfr_438p4_tnp_v2P0.pof - check sum:067CC2ED / user code: C4700020 // pfr_438p4_cyp_v2P0.pof - check sum:0680C492 / user code: C4720020 // pfr_438p4_tnp_v2P0_update_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_438p4_cyp_v2P0_update_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // non_pfr_tnp_v2P0.pof - check sum:09FF25CA / user code: C4700020 // non_pfr_cyp_v2P0.pof - check sum:0A0017BD / user code: C4720020 //! Known issue: (Sanity test config - CPLD v2P0 /BIOS0016D55/ BMC0.27_FRUSDR0.14) // 1.[TNP/CYP][2103632041] BPS AD mode has write-protected when UUT surprise AC power loss Correcting ADR function. PWRGD_PCH_PWROK delay 420us with PWRGD_PS_PWROK When AC PWR OFF. It's works on both RDIMM & BPS mode. // 2.[CYP] [2103632815] SUT will shut down automatically when do DC cycle with Riser attached. [2103632485] SUT can not power on ramdomly after AC/DC cycle with BPS 8+8 config. fixed accidentally shutdown issue caused by swithing MOS SW to fan. // 2.Adding CCB function. Using Front Panel Amber/Greeen LED to show status of the PFR. LEDs blinking 0.25s when PFR in T-1 mode. //! RTL – // 1. "ADR.v" modify the 'PWRGD_PS_PWROK_DLY_ADR' delay 420us; "PwrgdLogic.v" modify the 'PWRGD_PCH_PWROK' from delay 6ms to 0 // 2.[TNP/CYP] "pfr_tnp_core,pfr_cyp_core,pfr_tnp_recovery_core" add CCB function. //! FW - // 1.gen_gpo_controls.h is to add 'GPO_1_UPDATE_CAPSULE_INVALID_FLAG 24' & 'GPO_1_BMC_UNRECOVERABLE_FLAG 25' corresponding the RTL to show the fail status of the PFR. // these two pin are locate in the function 'check_capsule_before_update()' ================================================================================ v1p9 ================================================================================ //! 20200416 // pfr_438p4_tnp_v1p9.pof - check sum: 06770126 / user code: C4700019 // pfr_438p4_cyp_v1p9.pof - check sum: 067980D4 / user code: C4720019 // pfr_438p4_tnp_v1p9_update_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_438p4_cyp_v1p9_update_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // non_pfr_tnp_v1p9.pof - check sum: 09FB7876 / user code: C4700019 // non_pfr_cyp_v1p9.pof - check sum: 09F81704 / user code: C4720019 //! pfr is migrated to intel 438p4 //! Known issue: (Sanity test config - CPLD V1p9 /BIOS0016D15/ BMC0.24_FRUSDR0.13) // 1. BIOS0016D15 - TNP/CYP have OBB WDT issue when PFR is provisioned and Global system state is changed from // G3 to G2/S5 (AC Off to On), one need press button to change S5 to S0 two time within 25 mins. // (within 17 mins for 1p6/1p7/1p8) // 2. Suggestion - Unprovision the system before offline update flash // BMC Fail to boot to embedded linux and stop at bootloader stage. // // 3. "sysfwupdt.efi" build 3 support parameter*3 (-u -recovery UpdateNvram) to online update flash // # update bios capsule by (-u -recovery UpdateNvram) // # update bmc capsule by (-u) only before bmc version 0.26 or "BMC Fail to boot to embedded linux and stop at bootloader stage." // # update cpld capsule by (-u) only // // 4. # bmc 0.24 online downgrade to 0.23 - pass // # bmc 0.23 online upgrade to 0.24 - (TNP)Fail (FirmwareUpdateProcess:652: >>> State change: FWUMSTATE_VALIDATING --> FWUMSTATE_ERROR <<<) // => follow above 2. to offline update to 0.24 // # bmc 0.23 online upgrade to 0.25 - pass //! RTL – // 1. [TNP/CYP] "timer_bank" refer from “w1mSCE” to “w20mSCE”, to extend WDT timeout period from 17 min to 25 mnn // 2. [TNP/CYP] fix closed track -2103630542(Trig FIVR fault), //! FW - excerpt partial content from the RP-Release note, the complete information can refer the folder "RP_ReleaseNote" // 1. [TNP/CYP]CPLD RoT SVN : 00 // 2. [TNP/CYP]fw - mailbox_enums.h/ MB_CPLD_COMMON_REV_VALUE is changed to 0x93(cyp)/0x13(tnp) //! 422p4 // #Check consistency between PC type and update intent before checking the signature. This a follow-up to p4:6145377. Attacker may place authentic binaries at unexpected place. By putting this check before authenticating signature, we prevent Nios from hashing content beyond the SPI flash memory boundary. // // #Use macros from BSP to define flash size of SPI flash mock. In all authentication test cases, load the binaries to SPI flash instead of allocating new memory. CPLD would only authenticate binaries that are located on SPI flash. // // #Simplify logging so that CPLD and firmware update share the same minor error encoding. Also use one counter for all failed update attempts from BMC. This change releases about an 100 bytes. // // #Case:1507809716 BMC reset detection code is not running on non-legacy board. Now, enable this code after BMC has completed boot. // // #Fix security hole discovered by the new mix_and_match_attack test suite. There was a implicit trust on the update intent. Therefore, it was possible for CPLD to process say BMC active update while the PCH capsule is in the staging region instead. Added check on PC type against update intent value. // // #Simplify perform_cpld_recovery_update function to make space for my next change. After authenticating the BMC flash and applying its filtering rules, the CPLD staging region will be set as writable. Therefore, it's not necessary to do that in perform_cpld_recovery_update. // // #Fix a typo. BIOS completes boot after OBB stage is done. // // #Fix a bug where key cancellation certificate, for cancelling keys used for signing CPLD update capsule, fails authentication. The new unittests that involves key cancellation with this PC type failed before making this FW fix. All unittests passed now. // // #Change HW Timer resolution to 20 ms. // # RTL: // # Updated CC2/WC2/Idaville to use 20ms clock enable for timer bank as opposed to 1ms. Changes tested for compilation on all platform. // # FW: // # Increased all watchdog timeout values to 25mins // # // #Initialize SVN policy with authentic BMC/PCH Recovery FW SVN, after UFM provisioning/locking is done. //! 438p4 // #Add a restriction on enabling PIT L2. User can no longer enable PIT L2 without enabling PIT L1. // // #Clear ACM/BIOS boot done status in T-1. This is not necessary in the reference platform. // // #Update CPLD SVN in the mailbox register after CPLD recovery update. // // #Add one more bit definition in UFM status register that indicates completion of PIT L2 check. BIOS/BMC can then pass this information to platform owner. ================================================================================ v1p8 ================================================================================ //! 20200408 // pfr_393p6_tnp_v1p8.pof - check sum: 0687C4D3 / user code: C4700018 // pfr_393p6_cyp_v1p8.pof - check sum: 0676D755 / user code: C4720018 // pfr_393p6_tnp_v1p8_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_393p6_cyp_v1p8_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // non_pfr_tnp_v1p8.pof - check sum: 09FDF03E / user code: C4700018 // non_pfr_cyp_v1p8.pof - check sum: 09F8A8B0 / user code: C4720018 //1. [CYP] modify OCP3.0 function of OCP3.v and GSX_Master.v for CYP project //2. [TNP] For AC on/off issue caused by smbus (MM8/MM11) confliction with multi node Disable PFR-SMBUS-MM8(PSU)/MM11(HDD_Bp) with "highZ setting" based on hardware pin "FM_STAGE_ID" //3. [CYP/TNP] modify CPUcheck way which is oCPUMismatch judgement for SysCheck.v //4. [CYP] Adding FM_V800_IN pin for dead short issue //5. [CYP] Adding FM_OCP_JUDGE to pin-D21 for OCP function. //6. [CYP/TNP] Adding "FM_STAGE_ID" to Register Map for bmc & debug tool to accesss. //refer to STAGE_ID as below; ====================================== TNP / CYP | ID2 | ID1 | ID0 | -------------------------------------- Fab1 TNP | 0 | 0 | 0 | -------------------------------------- Fab1 CYP | 1 | 0 | 0 | -------------------------------------- Fab2 TNP | 1 | 0 | 1 | -------------------------------------- Fab2 CYP | 1 | 0 | 0 | -------------------------------------- Fab2 TNP | 0 | 0 | 1 | relay bypass| | | | -------------------------------------- Fab3 TNP | 0 | 1 | 0 | relay bypass| | | | -------------------------------------- Fab3 TNP | 1 | 1 | 0 | -------------------------------------- Fab3 CYP | 1 | 1 | 0 | ================================================= Note: Pin-ID2 is weak pull-up by pld setting ================================================= ================================================================================ v1p7 ================================================================================ //! 20200310 //! programming image // pfr_393p6_tnp_v1p7.pof - check sum: 0x067B22D7 / user code : C4700017 // pfr_393p6_cyp_v1p7.pof - check sum: 0x0678D69D / user code : C4720017 // pfr_393p6_tnp_v1p7_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_393p6_cyp_v1p7_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // // non_pfr_tnp_v1p7.pof - check sum: 0x09F9ACBA / user code : C4700017, used to clarify non_pfr issue // non_pfr_cyp_v1p7.pof - check sum: 0x09F81380 / user code : C4720017, used to clarify non_pfr issue // //! Known issue: // 1. RP(WilsonCity)& TNP have ACM WDT issue when PFR is provisioned and Global system state is changed from // G3 to G2/S5 (AC Off to On), one need press button to change S5 to S0 in 17 min. // No more ACM WDT issue from "S0 -> S5" or "S5 -> S0" when power on system to S0 once. // // Impact : low, the setting of ACM WDT is around 17 min, // //! Known behavior difference : compare with pfr363p6 (v1p6) // 1. When update cpld pfr image from v1p6 to v1p7, system will shut down and do authenticate. // bmc is blinking, then one can presses power button and system power on. // // (**new**)System will shut down(Don't do AC cycle), // and update bmc-flash "again" in background and do authenticate again. // bmc is blinking, then one can presses power button and system power on. // // it takes around 4 min to complete; and may take around other 2 min to wait bmc lan ready to do remotely. // each authentication takes 1 min * 2 (only authenticate bmc) // the other times are needed to bmc is ready and manual operate power button. // //! commmon code - non_pfr part //! 1. [TNP/CYP]common code version - v1p7; rtl-i2c/sgpio (TNP_CYP_Main.v) // //! pfr version : v393p6 //! RTL - pfr_tnp/cyp_xxx_core.v , implement a edge detection to pltrst to restart acm timer. //! FW - // 1. [TNP/CYP]CPLD RoT SVN : 00 // 2. core-cpld => pfr363\core_cpld\TNP_CYP\src // 4. [TNP/CYP]fw - mailbox_enums.h/ MB_CPLD_COMMON_REV_VALUE is changed to 0x91(cyp)/0x11(tnp) // 5. [TNP/CYP]fw - fix CCB OEM data in mailbox // AN-Root of Trust CPLD Reference Design (version : 0.11) // 1. pfr_sys.h: the watchdog timeout values are modified, the sectors for CPLD backup and factory images are // removed, a new BMC_CPLD_RECOVERY_IMAGE_OFFSET is added // 2. hierarchical_pfr.h: the compilation parameter “PLATFORM_COOPER_CITY_PO” is changed to // “PLATFORM_MULTI_NODES_ENABLED” // 3. ufm.h: the name of “pit_password” is changed to “pit_id” // 4. mailbox_enum.h: MB_UPDATE_INTENT_MASK_ENUM is changed, adds a component // “MB_UPDATE_INTENT_CPLD_RECOVERY_MASK”; MB_UFM_PROV_CMD_ENUM is changed, component // MB_UFM_PROV_PIT_PASSWORD is changed to MB_UFM_PROV_PIT_ID. // 5. spi_flash_state.h: the definition of SPI_FLASH_STATE_MASK_ENUM is changed, and the SPI flash state in other // files are changed accordingly. // 6. recovery_main() in recovery_main.h : the check for oldest_backup_addr, newest_backup_addr, // num_valid_backups are removed // 7. perform_update_post_reconfig() in cpld_update.h: the parameters of the function are removed, and the writing // to oldest backup region is removed // 8. Add a new function perform_cpld_recovery_update() in cpld_update.h: this function checks the CPLD update // capsule and do the copy from staging into CPLD recovery image, it is used for CPLD recovery update only. // 9. perform_cpld_recovery() in cpld_recovery.h: it doesn’t use backup images, it uses only 1 copy of recovery image // instead, and if the recovery image is invalid, it boots up the BMC and waits for BMC downloading a valid update // CPLD image. // 10. Add a new function boot_bmc_and_wait_for_recovery_update() in cpld_recovery.h: this function is used to // boot up BMC and gets a new image for CPLD from BMC. // 11. act_on_bmc_update_intent() in tmin1_update.h: add the process for CPLD recovery update // 12. process_pending_recovery_update in tmin1_update.h: add the recovery update operation of CPLD // 13. perform_tmin1_operations() in tmin1_routines.h: the recovery update operation is applied before // the original t-1 operations, and the t-1 operations for BMC and PCH are separated. // 14. perform_entry_to_t0() in transition.h: remove the branch of Authentication failure for BMC-only or PCH-only // 15. firware_update.h: function perform_firmware_update() is changed to perform_active_firmware_update() // 16. apply_spi_write_protection_and_smbus_rules() in pfm_utils.h: Only apply SMBus rules from BMC PFM, remove // the write disable to staging region when recovery update is in progress ================================================================================ v1p6 ================================================================================ //! 20200121 //! programming image // pfr_363p6_tnp_v1p6.pof - check sum: 0x0675D13E / user code : C4700016 // pfr_363p6_cyp_v1p6.pof - check sum: 0x0682CCF4 / user code : C4720016 // pfr_363p6_tnp_v1p6_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // pfr_363p6_cyp_v1p6_capsule_sign.bin, used by EWS/sysfwupdt.efi to online update // // non_pfr_tnp_v1p6.pof - check sum: 0x09FF06AC / user code : C4700016, used to clarify non_pfr issue // non_pfr_cyp_v1p6.pof - check sum: 0x09FD7B62 / user code : C4720016, used to clarify non_pfr issue // //! 1. [CYP] fix 2103630542 CPLD 1p4 lock I2C devices, cause some I2C devices can be read, like AIC interposer and midplane. //! 2. [CYP] fix 2103630543 BB with one midplane and 2 AIC interposer not the standard configurarion. // Only used for factory testing. Need add to configuration or use new configuration for factory testing. //! 3. [CYP] fix 2103629683 VR watchdog event will be trigger after remove CPU 1 //! 4. [TNP/CYP]common code version - v1p6; rtl-i2c/sgpio (TNP_CYP_Main.v) // //! pfr version : v363p6 //! 1. [TNP/CYP]CPLD RoT SVN : 00 //! 2. core-cpld => pfr363\core_cpld\TNP_CYP\src // \common\onctl_fix.v // {FM_SLPS3_N, FM_SLPS4_N, FM_BMC_ONCTL_N} = 3'b110, all conditions are met to latch output(FM_BMC_ONCTL_N_LATCH) // ClockLogic.v // enables Ascyncronous reset // SysCheck.v // from "define" to "localparam" // TNP_CYP_Main.v // remove "GlitchFilter" in and add "assign FP_BMC_PWR_BTN_CO_N = DBP_POWER_BTN_N;" // // add "GlitchFilter2" for "wPWRGD_CPU_LVC3" //! 3. pfr IP module //! cyrpto/pfr_sys/recovery_sys/smbus_filtered_relay/spi_control are updated. //! 4. [TNP/CYP]fw- mailbox_enums.h/ MB_CPLD_COMMON_REV_VALUE is changed to 0x90(cyp)/0x10(tnp) //! 5. [TNP/CYP]fw(CCB)- support SVN downgrade/ BIOS OEM specific data ================================================================================ v1p5 ================================================================================ //! 20191230 //! programming image // pfr_313p1_tnp_v1p5.pof - check sum: 0x0686686D / user code : C4700015 // pfr_313p1_cyp_v1p5.pof - check sum: 0x06814C28 / user code : C4720015 // pfr_313p1_tnp_v1p5_capsule_sign.bin , used by EWS to online update // pfr_313p1_cyp_v1p5_capsule_sign.bin , used by EWS to online update // non_pfr_tnp_v1p5.pof - check sum: 0x09FDC133 / user code : C4700015, used to clarify non_pfr issue // non_pfr_cyp_v1p5.pof - check sum: 0x09FCD046 / user code : C4720015, used to clarify non_pfr issue //! 1. [TNP] fix 2103630273 EMP FRU device not found on CPLD v1.4 //! 2. [CYP]workaround/fix cyp MM13 connection to relay4 // smbus in/out connections are reversed to origninal definition //! 3. [TNP/CYP]update a device list for fab2-tnp/cyp (cpld-pfr blocks the device access if the device is not on list) //! 4. [TNP/CYP]common code version - v1p5 // rtl-i2c/sgpio (TNP_CYP_Main.v) //! 5. [TNP/CYP]input pins(FP_ID_BTN_N) is changed from "3.3-V LVTTL" to "3.3 V SCHMITT TRIGGER" //! 6. [TNP/CYP]Solving protentially fail to boot caused by dual bios i/o setting // floating I/O SPI_PCH_ICX_CS0_N/SPI_PCH_CPX_CS0_N, revise to "input" & "WEAK_PULL_UP" // //! pfr version : v313p1 //! 1. [TNP/CYP]CPLD RoT SVN : 00 //! 2. [TNP/CYP]fw- mailbox_enums.h/ MB_CPLD_COMMON_REV_VALUE is changed to 8f(cyp)/0f(tnp) //! 3. [TNP/CYP]fw- "gen_smbus_relay_config.h" are customized for tnp/cyp, // need corresponding bmc image (with json setting) to pass authentication. ================================================================================ v1p4 ================================================================================ //! 20191209 //! programming image // pfr_313p1_tnp_v1p4.pof - check sum: 0x068001C7 / user code : C4700014 // non_pfr_tnp_v1p4.pof - check sum: 0x0A028947 / user code : C4700014 // pfr_313p1_tnp_v1p4_capsule_sign.bin - used for online update by EWS // pfr_313p1_cyp_v1p4.pof - check sum: 0x0685CB76 / user code : C4720014 // non_pfr_cyp_v1p4.pof - check sum: 0x0A0289C6 / user code : C4700014 // pfr_313p1_cyp_v1p4_capsule_sign.bin - used for online update by EWS //! v1p4 -- common code //! 1. [TNP]fixed power on signal of edsff docking board //! 2. [TNP/CYP]fixed "MEM_THERM_EVENT_CPUx" for BMC to latch event //! 3. [TNP/CYP]common code version - v1p4 // rtl-i2c/sgpio (TNP_CYP_Main.v) //! 4. [TNP/CYP]other : input pins(VR Powergood) are changed from "3.3-V LVTTL" to "3.3 V SCHMITT TRIGGER" // //! pfr version : v313p1 // rtl- SMBUS_MAILBOX_ADDR : CPU side (0x70-7bit)/BMC side (0x38-7bit) // to solve device address conflict with CYP-HSBPe //! fw - mailbox_enums.h/ MB_CPLD_COMMON_REV_VALUE is changed to 8e(cyp)/0e(tnp) ================================================================================ v1p3 ================================================================================ //! 20191108 //! v1p3 -- common code // non_pfr_cyp_v1p3.pof - check sum: 0x0A00780C / user code : C4720013 //! 1. cpld common revision is locate in .ivSMBusReg0A(FPGA_MAJOR_REV) // one byte => bit7 : CYP(1)/TNP(0) ; bit6 ~bit0 : rev : 0001101 //! 2. (CCB1) add pin "FM_BMC_SVN_DOWNGRADE/ FM_SVN_BYPASS" //! 3. add reserved pin "FM_SASM_ROC_ID0/ FM_SASM_ROC_ID1/ FM_PCA9555_INT_N" // "FM_MIDPLANE_SWITCHID_0/ FM_MIDPLANE_SWITCHID_1/ FM_SASM_CPU1_N/ FM_SASM_CPU2_N" //! 4. (HSD -2103629273) CYP CPLD - DIMM FAULT LED, follow bmc team request. //! 5. set "WEAK_PULL_UP_RESISTOR ON" to RST_DEDI_BUSY_PLD_N // dediprog connector is changed and remove the pin, set pull up to solve uncertainty. //! 6. update ocp.v // //! pfr is migrated to v313p1 // SMBUS_MAILBOX_ADDR is modified back to "7'h70", // the decision is not made yet, but the address is conflicted with device on cyp backplane // fw - support relay4 // smbus_relay_utils.h/ pfr_pointers.h/ gen_gpo_controls.h ================================================================================ v1p2 ================================================================================ //! 20191016 //! v1p2 -- common code // non_pfr_cyp_v1p2.pof - check sum: 0x09FC963C / user code : C4720102 //! 0. fixed bugs that are relevant SEL event from BMC - sgpio data is provided by cpld //! 1. (RQ101)suppress unexpected noise when power on //! 2. (RQ102)new requirement to control ocp // Add offset 0x0031~0x0035 of IICRegs register map, for BMC to control OCP state // module ocp - ocp3.v / Module - IICRegs - ContReadSeqWriteRegs.v / IICRegs.v / IICRegsController.v // new module - GSX_OCP_MASTER.v - to support the data format from the ocp card // new interface - wBMC_OCP3_SMBUS_EN / wBMC_OCP3_MODE , FM_PRE_P12V_OCP_AUX_EN, FM_FAN_S5_PRESW_EN, Fan_delay //! 3. (RQ103)support dual bios // 3.1 external jumper (keep original implementation, but sdc constraints is changed. // SPI_PCH_BMC_PFR_CS0_N => SPI_PFR_PCH_BMC_SECURE_CS0_N (with mux) // 3.2 another cs signals(pin) - SPI_PCH_ICX_CS0_N /SPI_PCH_CPX_CS0_N from CPLD (no mux) //! 4. (RQ104)remove jumper by setting from bmc // Add offset 0x0036 of IICRegs register map, //! 5. follow PDG & modified power sequence // module - Mstr_Seq.v / PwrgdLogic.v / //! 6. add new i/o // FM_STAGE_ID2/ SPI_PCH_ICX_CS0_N /SPI_PCH_CPX_CS0_N /IRQ_SML1_PMBUS_PCH_ALERT_N /FM_BMC_SVN_DOWNGRADE // TEST_PIN/ FM_FAN_S5_PRESW_EN/ FM_PRE_P12V_OCP_AUX_EN //! affected common code module // non_pfr_core_tnp.sv / non_pfr_core_cyp.sv / TNP_CYP_Wrapper.sv / TNP_CYP_Main.v / ================================================================================ v1p1 ================================================================================ //! v1p1 -- non pfr //! 1. Mitac Internal test version to replace jumper //! ================================================================================ v1p0 ================================================================================ //! V1.0 //! user code : C470(project code)_0100(Version) / check sum: 0x09F7FD13 //! //! 1. (Code)parameter FPGA_MAJOR_REV/FPGA_MINOR_REV are changed from 0x00/0x00 to 0x01/0x00 //! 2. (Code)known issue - OCP3-NIC Power control signals are toggled and caused by false present signal //! Temporary sol > force FM_P3V3_OCP_AUX_EN/FM_P12V_OCP_AUX_EN to turn on //! 3. (Setting) Known issue - PSU_P12V_STBY is shut down by over current //! and caused by output pin(FM_FAN_MAIN_SW_EN) without external pull-down R that turn on main rail MOS-SW at cpld initializing state. //! = > disable "Set i/o to weak pull-up prior usermode" ================================================================================ v0p2 ================================================================================ //! 20190623 //! v02 //! user code : C4700002 / check sum: 0x09FCE5DC //! //! 1. setting all output current strength to 8 mA //! 2. integrate PFR RELAY function //! 3. revise module "PSU_Seq" to solve false pg of hot swap controller //! 4. enable timeout to module "Cpu_Seq" - //! Temporary solution for pg of vrd(VCCSA) is not working properly now //! 5. change cs pin to flash part of bmc //! 6. added blinking led to pfr led as healthy status